Conferences
- “Data-Driven Mixed Precision Sparse Matrix Vector Multiplication for GPUs“; Khalid Ahmad, Hari Sundar and Mary Hall, HiPEAC 2020 (PDF)
- “Optimizing LOBPCG: Sparse Matrix Loop and Data Transformations in Action”; Khalid Ahmad, Anand Venkat and Mary Hall, LCPC 2016 (PDF)
- “Loop and Data Transformations for Sparse Matrix Code“; Anand Venkat, Mary Hall and Michelle Strout, PLDI 2015, June 2015 (PDF)
- “A Script-Based Autotuning Compiler System to Generate High-Performance CUDA code“; Malik Khan, Protonu Basu, Gabe Rudy, Mary Hall, Chun Chen, Jacqueline Chame, 8th HiPEAC, January 2013 (PPTX)
- “Non-affine Extensions to Polyhedral Code Generation“; Anand Venkat, Manu Shantharam, Mary Hall and Michelle Strout, CGO 2014, February 2014 (PDF)
- “Polyhedra Scanning Revisited“; Chun Chen, Anand Venkat, PLDI 2012, June 2012 (PDF)
- “Automating Application Mapping with Autotuning: Paving the Way to Exascale“, DOE Salishan Conference, April 2012 (PDF)
- “A Programming Language Interface to Describe Transformations and Code Generation“; Gabe Rudy, Malik Murtaza, Khan, Mary Hall, Chun Chen, Jacqueline Chame, LCPC 2010, October 2010 (PDF)
Workshops
- “Improving High Performance Sparse Libraries using Compiler-Assisted Specialization: A PETSc Case Study”, Shreyas Ramalingam, HIPS 2012 (PDF)
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Compiler Based Autotuning, ACACES 2011, International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems:
- Tuning code with CHiLL
- A Closer Look at Polyhedral Compiler Technology
- Parallel Code Generation and CUDA-CHiLL
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“A Compiler-Based Strategy for Performance Tuning of Applications”; invited speaker, Workshop in Memory of Ken Kennedy, Rice University, December, 2007 (Video)